ECET 220 ECET220 ECET/220 ENTIRE COURSE HELP – DEVRY UNIVERSITY

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ECET 220 ECET220 ECET/220 ENTIRE COURSE HELP – DEVRY UNIVERSITY

ECET 220 Week 1 Homework

ECET 220 Week 1 iLab Analysis of BJT Characteristics comprising of BJT Biasing using Simulation and Actual Construction

ECET 220 Week 2 Homework

ECET 220 Week 2 iLab Analysis of BJT Amplifier Classes of Operation using Simulation and Actual Construction

ECET 220 Week 3 Homework

ECET 220 Week 3 iLab Analysis of JFET Characteristics and Amplifiers

ECET 220 Week 4 Homework

ECET 220 Week 4 iLab Inverting and Non-Inverting Op Amp Circuits

ECET 220 Week 5 Homework

ECET 220 Week 5 iLab Summing Amplifier (Inverting and Non-Inverting) and Instrumentation Amplifier

ECET 220 Week 6 Homework

ECET 220 Week 6 iLab Differentiator and Integrator Circuits

ECET 220 Week 7 Homework

ECET 220 Week 7 iLab Differential (Difference) Amplifier and Audio Amplifier

ECET 220 ECET220 ECET/220 ENTIRE COURSE HELP – DEVRY UNIVERSITY

ECET 220 Week 1 iLab Analysis of BJT Characteristics comprising of BJT Biasing using Simulation and Actual Construction

Objectives:

To analyze a normally biased BJT circuit comprising of a BJT and resistors and measure the circuit voltages between emitter, common, base, and collector.

To theoretically calculate and verify the circuit using Ohm’s law or Kirchhoff’s law, which were learned in previous classes.

Determine the voltage drop across the collector load resistance and measure the current passing through emitter and collector resistors.

Determine if the collector-based junction is forward or reversed biased.

Questions:

What is the total resistance between the base and +V_cc?

Is the base-to-emitter voltage close to 0.7 V?
Is the collector-to-emitter voltage less than V_cc?
Is the collector-to-emitter voltage greater than 0.3 V?
How much current must be passing through the emitter resistor in mA?
What is the voltage drop across the collector load resistance (V_RC) in V?
What is the collector current in mA? Approximately.
By removing R₄ and therefore changing the value of the base-to-V_CC Has it changed the collector-to-emitter voltage? How?
By removing R₄ and therefore changing the value of the base-to-V_CC Has it changed the collector current? How?
By removing R₄ and therefore changing the value of the base-to-V_CC Has it changed the base-to-emitter voltage? By how much?

ECET 220 ECET220 ECET/220 ENTIRE COURSE HELP – DEVRY UNIVERSITY

ECET 220 Week 2 Homework

Chapter 5: Problems 1, 7, 8, and 12

5.1 a.  What is the expected amplification of a BJT transistor amplifier if the dc supply is set to zero volts?  0

1. What will happen to the output ac signal if the dc level is insufficient? Sketch the effect on the waveform.  It will be clipped
2. What is the conversion efficiency of an amplifier in which the effective value of the current through a 2.2-kΩ load is 5 mA and the drain on the 18-V dc supply is 3.8 mA?  80

5.7  Using the model of Fig. 16, determine the following for a common-emitter amplifier if β = 80, IE (dc) = 2 mA, and r0 = 40 kΩ.

5.8 The input impedance to a common-emitter transistor amplifier is 1.2 kΩ with β = 140, ro = 50 kΩ, and RL= 2.7 kΩ. Determine:

5.12  For the network of Fig. 153:

ECET 220 ECET220 ECET/220 ENTIRE COURSE HELP – DEVRY UNIVERSITY

ECET 220 Week 2 iLab Analysis of BJT Amplifier Classes of Operation using Simulation and Actual Construction

Objectives:

1. To analyze a BJT Amplifier Classes Amplifier comprising of two capacitors (C) and resistors (R) and measure voltage drops and currents at different locations.
2. To theoretically calculate and verify the circuit using Ohm’s law and Kirchhoff’s law, which were learned in previous courses.
3. Determine the voltages (V_E, V_C, V_B) with respect to the circuit common. Measure and verify the same using the simulation.
4. Determine if the output voltage is in-phase or out-of-phase with its input waveform.

Did your theoretical calculations closely match the results obtained from the Multisim simulation? (Yes, No)

Did your theoretical calculations closely match the results obtained from the Proto Board circuit? (Yes, No)

Did your results obtained from the Multisim simulation closely match the results obtained from the Proto Board circuit? (Yes, No)

ECET 220 ECET220 ECET/220 ENTIRE COURSE HELP – DEVRY UNIVERSITY

ECET 220 Week 3 Homework

# 2 (e book, Qn.# 2, pg.# 416 & Hard Cover Ed., Qn.# 2, pg.# 418)

Using the characteristics of Fig. 11, determine I_D for the following levels of V_GS(with V_DS > V_P):

# 6 (e Book, pg.# 416-417) Hard Cover Ed. Prob.# 7, pg.# 419

• a. Describe in your own words why I_G is effectively 0 A for a JFET transistor.
• b. Why is the input impedance to a JFET so high?
• c. Why is the terminology field effect appropriate for this important three-terminal device?

# 16 (e book, pg.# 418) Hard Cover Ed., Qn.# 18, pg.# 420

Define the region of operation for the 2N5457 JFET of Fig. 22 using the range of I_DSS and V_P provided. That is, sketch the transfer curve defined by the maximum I_DSS and V_P and the transfer curve for the minimum I_DSS and V_P. Then, shade in the resulting area between the two curves.

# 17 (E book, Qn.# 17, pg.# 418) & hard cover Ed., Qn.# 20, pg.# 428. The numbers given are different  and they are 30 V & 100 mW

Chapter 7

# 1 Fixed-Bias Configuration

For the fixed-bias configuration of Fig. 80:

1. Sketch the transfer characteristics of the device.
2. Superimpose the network equation on the same graph.
3. Determine and I_DQ and V_DSQ
4. Using Shockley’s equation, solve for and then find I_DQ and V_DSQ. Compare with the solutions of part (c).

# 2 (e book, Pg.# 476)

# 6 (e book, pg.# 477) Hard cover Ed., Prob.# 7, pg.# 474

For the self-bias configuration of Fig. 85:

1. Sketch the transfer curve for the device.
2. Superimpose the network equation on the same graph.
3. Determine and I_{D Q} & V_{GS Q}
4. Calculate VDS, VD, VG, and VS.

# 11

Chapter 8

# 3 For a JFET having device parameters g_m0 = 5 mS and V_P = −3.5 V, what is the device current at V_GS = 0 V?

(Ebook, Pg.# 541)

# 12 Using the drain characteristic of Fig. 72:

• a. What is the value of r_d for V_GS = 0 V?
• b. What is the value of g_m0 at V_DS = 10 V?

# 17 Determine Z_i, Z_o, and A_V for the network of Fig. 73 if I_DSS = 10 mA, V_P = −4 V, and r_d = 40 kΩ.

# 23.  Determine Z_i, Z_o, and V_o for the network of Fig. 76 if V = 20 mV.