ECEN 248 ECEN248 Lab 5 Simple Arithmetic Logic Unit – Texas A&M
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ECEN 248 ECEN248 Lab 5 Simple Arithmetic Logic Unit – Texas A&M
Objectives:
In this lab, I will design, implement, and test a 4-bit ALU with has the abilities to add, subtract, and perform bit-wise AND. I will also gain experience in multiplexers and calculating two’s complement in order to perform the subtraction.
Design:
In part 1 of the lab, the goal was to design, build, and implement a 4-bit full adder/subtractor. The materials used for this part of the lab included, the power supply, breadboard, many wires, 4 LEDs, a full-adder chip, and an exclusive-or chip.
Description
ECEN 248 ECEN248 Lab 5 Simple Arithmetic Logic Unit – Texas A&M
Objectives:
In this lab, I will design, implement, and test a 4-bit ALU with has the abilities to add, subtract, and perform bit-wise AND. I will also gain experience in multiplexers and calculating two’s complement in order to perform the subtraction.
Design:
In part 1 of the lab, the goal was to design, build, and implement a 4-bit full adder/subtractor. The materials used for this part of the lab included, the power supply, breadboard, many wires, 4 LEDs, a full-adder chip, and an exclusive-or chip.
The start, you must attach the power and ground to the breadboard and then two the full-adder and XOR chips. After this, place 10 wires in the “low” or 0 position to represent a0-a3, b0-b3, c1, and c2.
From there, wire the full-adder chip according to the diagram below, using the XOR chip to implement the subtraction element of the adder/subtractor. Once the logic is in place, wire the LEDs from the SUM0-SUM3 outputs
ECEN 248 ECEN248 Lab 5 Simple Arithmetic Logic Unit – Texas A&M
ECEN 248 INTRO TO DIGITAL LOGIC School: Texas A&M University (Texas A&M) *Professor:Ivan Diaz Rodriguez, Lu, CHOI, SRINIVAS, SHAKKOTTAI, Staff, K… Documents (2709) Q&A (26) Textbook Exercises (20+) Most important docs of the week 3 pagesLab 1 Post-Lab.docxLab 1 Post-Lab.docx Texas A&M University
ECEN 248 – Fall 2017 Register Now Lab 1 Post-Lab.docx 13 pagesLab Report 12.docxLab Report 12.docx Texas A&M University INTRO TO DIGITAL LOGIC
ECEN 248 – Spring 2014 Register Now Lab Report 12.docx 13 pagesLab 12 post labLab 12 post lab Texas A&M University INTRO TO DIGITAL LOGIC
ECEN 248 – Spring 2014 Register Now Lab 12 post lab 8 pagesLab 12 – Report.docxLab 12 – Report.docx Texas A&M University INTRO TO DIGITAL LOGIC
ECEN 248 – Spring 2014 Register Now Lab 12 – Report.docx 6 pagesLab 12 PreLab.docxLab 12 PreLab.docx Texas A&M University INTRO TO DIGITAL LOGIC
ECEN 248 ECEN248 Lab 5 Simple Arithmetic Logic Unit – Texas A&M
ECEN 248 – Spring 2014 Register Now Lab 12 PreLab.docx INTRO TO DIGITAL LOGIC Documents All (2709) Homework Help (65) Lab Reports (1350) Lecture Slides (4) Notes (130) Test Prep (61) Showing 1 to 30 of 2,709 Sort by:
Most Popular 8 pagesLab6IntroductiontoLogicSimulationandVerilogLab6IntroductiontoLogicSimulationandVerilog Texas A&M University INTRO TO DIGITAL LOGIC
ECEN 248 – Spring 2014 Register Now Lab6IntroductiontoLogicSimulationandVerilog 10 pagesLab 8Lab 8 Texas A&M University Digital Logic
ECEN 248 – Spring 2016 Register Now Lab 8 11 pagesECEN_248 Lab9.pdfECEN_248 Lab9.pdf Texas A&M University INTRO TO DIGITAL LOGIC
ECEN 248 – Fall 2018 Register Now ECEN_248 Lab9.pdf 6 pagesLab 12 PreLab.docxLab 12 PreLab.docx Texas A&M University INTRO TO DIGITAL LOGIC
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ECEN 248 ECEN248 Lab 5 Simple Arithmetic Logic Unit – Texas A&M
ECEN 248 – Spring 2014 Register Now Lab9 3 pagesprelab11prelab11 Texas A&M University INTRO TO DIGITAL LOGIC
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ECEN 248 – Spring 2008 Register Now Lab 9 Report.docx 6 pagesUntitleddocument (2)Untitleddocument (2) Texas A&M University Digital Logic
ECEN 248 – Spring 2016 Register Now Untitleddocument (2) 2 pagesPreLab 8 Report.docxPreLab 8 Report.docx Texas A&M University INTRO TO DIGITAL LOGIC
ECEN 248 – Spring 2014 Register Now PreLab 8 Report.docx 2 pagesENGR 216 LAB 6.docxENGR 216 LAB 6.docx Texas A&M University INTRO TO DIGITAL LOGIC
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ECEN 248 ECEN248 Lab 5 Simple Arithmetic Logic Unit – Texas A&M
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ECEN 248 – Spring 2014 Register Now prelab 9.docx 13 pageslab12_regularlab12_regular Texas A&M University INTRO TO DIGITAL LOGIC
ECEN 248 ECEN248 Lab 5 Simple Arithmetic Logic Unit – Texas A&M
ECEN 248 – Spring 2014 Register Now lab12_regular 6 pagesLAB 3LAB 3 Texas A&M University INTRO TO DIGITAL LOGIC
ECEN 248 – Spring 2014 Register Now LAB 3 6 pagesLab 5 Report.docxLab 5 Report.docx Texas A&M University INTRO TO DIGITAL LOGIC
ECEN 248 – Spring 2008 Register Now Lab 5 Report.docx 4 pagesECEN 248 Post-Lab 1ECEN 248 Post-Lab 1 Texas A&M University Digital Logic
ECEN 248 – Spring 2016 Register Now ECEN 248 Post-Lab 1 5 pagesPrelab 4Prelab 4 Texas A&M University INTRO TO DIGITAL LOGIC
ECEN 248 – Fall 2013 Register Now Prelab 4 17 pageslab8lab8 Texas A&M University INTRO TO DIGITAL LOGIC
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ECEN 248 – Fall 2014 Register Now ecen 248 Prelab lab 3 6 pagesLab 4 ECEN 248.docxLab 4 ECEN 248.docx Texas A&M University INTRO TO DIGITAL LOGIC
ECEN 248 – Fall 2017 Register Now Lab 4 ECEN 248.docx Prev 1 2 3 4 5 Next Recent Documents 1 pagesPre_lab_4_part_2.jpgPre_lab_4_part_2.jpg Texas A&M University Digital Logic
ECEN 248 ECEN248 Lab 5 Simple Arithmetic Logic Unit – Texas A&M
ECEN 248 – Spring 2016 Register Now Pre_lab_4_part_2.jpg 2 pagesPre-Lab 6.pdfPre-Lab 6.pdf Texas A&M University Digital Logic
ECEN 248 – Spring 2016 Register Now Pre-Lab 6.pdf 1 pagesLab_7 (Pre_Lab).pdfLab_7 (Pre_Lab).pdf Texas A&M University Digital Logic
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ECEN 248 – Spring 2016 Register Now Lab_2.pdf 4 pagesPreLab 10.pdfPreLab 10.pdf Texas A&M University Digital Logic
ECEN 248 – Spring 2016 Register Now PreLab 10.pdf Textbook Exercises Fundamentals of Digital Logic with VHDL Design image Fundamentals of Digital Logic with VHDL Design Ch 2, Section EoC End of Chapter, Exercise 2.1Consider the expression x+yz=(x+y)(x+z) .
Consider the left handed term is x+yz and the right…Fundamentals of Digital Logic with VHDL Design Ch 3, Section EoC End of Chapter, Exercise 3.1For a 3 input logic circuit, there are 8 different combinations for which the output can be…
ECEN 248 ECEN248 Lab 5 Simple Arithmetic Logic Unit – Texas A&M
Fundamentals of Digital Logic with VHDL Design Ch 4, Section EoC End of Chapter, Exercise 4.1Write the truth table for the given function f(x_1,x_2,x_3)=\sum m(1,2,3,5) . Determine the number…Fundamentals of Digital Logic with VHDL Design Ch 5, Section EoC End of Chapter, Exercise 5.1
All positive numbers are called unsigned numbers. The binary number is represented by using the…Fundamentals of Digital Logic with VHDL Design Ch 6, Section EoC End of Chapter, Exercise 6.1Draw a 3 to 8 binary decoder for the given function, f(w_1, w_2, w_3)=\sum m(0, 2, 3, 4, 5, 7) .
It…Fundamentals of Digital Logic with VHDL Design Ch 7, Section EoC End of Chapter, Exercise 7.5Consider the characteristic table of D flip-flop is shown in Table 1. …Fundamentals of Digital Logic with VHDL Design Ch 8, Section EoC End of Chapter, Exercise 8.4The inputs are clock and reset.
The output is z and it consists of 4 bits. According to the states…Fundamentals of Digital Logic with VHDL Design Ch 9, Section EoC End of Chapter, Exercise 9.1Consider that w_{1} and w_{2} are the inputs, y_{1} and y_{2} are the next states, z_{1} and z_{2}…
Fundamentals of Digital Logic with VHDL Design Ch 10, Section EoC End of Chapter, Exercise 10.1The modified shift register circuit in which the parallel-load operation can be performed only when…Fundamentals of Digital Logic with VHDL Design INTRO TO DIGITAL LOGIC
ECEN 248 ECEN248 Lab 5 Simple Arithmetic Logic Unit – Texas A&M
Tests Questions & Answers Showing 1 to 8 of 26 View all Please see attachments for details 1 2 3 4 5 Please see an attachment for details 1 2 3 4 5 Please see an attachment for details 1 2 3 4 5
Please see an attachment for details 1 2 3 4 5 The attached problems please 1 2 3 4 5 The three attached problems. 1 2 3 4 5 These are simplified equations using boolean algebra can you please help me optimize each one and draw the circuits please. 1 2 3 4 5 Can you please help me simplify each one separately using boolean algebra 1 2 3 4 5
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